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LC-32LE63x
LC-40LE63x
LC-46LE63x
10-1 Main Unit (Continued)
PNX85500 Control
B01E
I
I
+3V3-STANDBY
+3V3-STANDBY
H
H
VCC
Φ
IF51
2
PNX-SPI-SDI
Q
512K
FLASH
G
G
HOLD
VSS
F
F
MAIN NVM
+3V3
E
E
IF58
7F58
Φ
(8K × 8)
3F58
D
D
EEPROM
1
IF59
0
2
1
ADR
3
2
FF57
C
C
B
B
A
A
1
1
2
2
3
3
B01E
PNX85500 Control Schematic Diagram
+3V3-STANDBY
7F52
M25P05-AVMN6
IF50
5
D
IF52
6
C
IF53
1
S
IF54
3
W
7
+3V3-STANDBY
IF61
FF29
IF62
FF04
DEBUG ONLY
2F58
RES
SCL-SSB
100n
SDA-SSB
7
WC
FF55
3F59
6
SCL-UP-MIPS
SCL
100R
FF56
3F60
5
SDA-UP-MIPS
SDA
100R
DEBUG / RS232 INTERFACE
TXD-UP
RXD-UP
RESET-STBYn
SPI-PROG
4
4
5
5
6
6
+3V3
+3V3
PNX-SPI-SDO
PNX-SPI-CLK
PNX-SPI-CSBn
IF55
PNX-SPI-WPn
BOOST-PWM
SPI-PROG
SDM
3F53
10K
FF61
3F62
100R
3F63
FF63
100R
FF65
3F64
100R
FF66
3F65
100R
7
7
8
8
9
9
10
10
102
+3V3
3F66
BACKLIGHT-BOOST
7F53
RES
+5V
PDTA114EU
7F54-1
RES
6
BC847BPN(COL)
7F54-2
RES
IF56
BC847BPN(COL)
4
2
IF57
1
5
3
9CH0
FF58
RES
1F52
1
SCL
FF62
2
SDA
3
4
5
RES
1F51
1
FF64
2
UP
3
4
5
7
6
SPB SSB TV550
2K11 4DDR EU
11
11
12
12
13
13
B01E
LEVEL
SHIFTED
FOR
DEBUG
USE ONLY
4
2010-12-10
3139 123 6495
14
14
15
15
16
16
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