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Circuit Descriptions (continued)
7.1.3
SSB Cell Layout
1M95
7E01
1M99
1M59
DC/DC
C
DDR2
DDR2
DDR2
DDR2
SCART1/YPbPr
1E32
R
L
Y
SPDIF
Output
Figure 7-2 SSB layout cells (top view)
DVB-S DC/DC
Ambilight
CPLD
FLASH
LVDS-OUT
LVDS-OUT
CA
CA
PNX85500
PNX85500
M1
M1
27x27
27x27
TS-IN
TS-IN
USB
USB
1.00mm
1.00mm
HDMI
HDMI
Heatsink
ETH
ETH
GPIO
GPIO
I²S
I²S
ANA
ANA
ANA
ANA
STDBY
STDBY
SPDIF
SPDIF
AUD
AUD
VID
VID
SVC
Pb
Pr
L/R
71
LC-32LE63x
LC-40LE63x
LC-46LE63x
DVB-S2
CD
T
uner
DVB-S DC/DC
SD-SLOT
1F24
USB2.0
Hybrid
Tuner
HDMI
19100_058_110217.eps
110217
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