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Sharp FACSIMILE FO-4500 Service Manual page 96

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FO-4500H
LZ9FJ37A (IC15) Terminal descriptions
PIN
I/O
Name
1
O
DP
2
O
DT4
3
O
DT3
4
O
DT2
5
O
DT1
6
O
BZ
7
O
BZSL
8
I
SDT
9
I
XRHS
10
I
XCI
11
I
XHS1
12
I
XHS2
13
I
XEXHS1
14
I
XEXHS2
15
O
CRNT
16
O
TXB1
17
O
TXB0
18
O
TXA1
19
O
TXA0
20
VDD
21
GND
22
O
TXPB
23
O
TXPA
24
O
LEDON
25
O
PLG1ON
26
O
PLG0ON
27
GND
28
I
CLKR
29
I
XFLBSY
30
O
FLBK1
31
O
FLBK2
32
O
FLBK3
33
O
XFLOPT
34
O
XFLSTD
35
O
XPGMSL
36
O
XSRAM1
37
O
XSRAM0
38
O
XINTRQ
39
O
XREVSL
40
I
XRESET
41
GND
42
I
CLKF
43
O
XCDCSL
44
O
XGACSL1
45
O
XGACSL0
46
O
XGABSL
47
O
XWR
48
I
XRD
49
I
XWRH
50
I
XWRL
51
I/O
D15
Function
Dial pulse control
Output port
Output port
Output port
Output port
Buzzer output
Output port
Input port
Input port
Input port
Input port
Input port
Input port
Input port
Output port
B-phase current control output 1
B-phase current control output 0
A-phase current control output 1
A-phase current control output 0
Power supply
Ground
B-phase current direction setting
A-current direction setting
LED light source control
Plunger 1 control
Plunger 0 control
Ground
Sending system control basic clock input
Flash memory busy signal input
Bank control 1
Bank control 2
Bank control 3
Chip select (flash option)
Chip select (flash standard)
Chip select (EPROM)
Chip select (SRAM option)
Chip select (SRAM standard)
Interrupt request output
Chip select (spare)
System reset
Ground
System clock
Chip select
Chip select (spare)
Chip select
Chip select (gate array B)
System write output
System read signal
System write (high-order byte) signal
System write (low-order byte) signal
System data input/output
PIN
I/O
Name
52
I/O
D14
53
I/O
D13
54
I/O
D12
55
I
XCS6
56
I
XCS2
57
I/O
D11
58
I/O
D10
59
I/O
D9
60
I/O
D8
61
GND
62
VDD
63
I/O
D7
64
I/O
D6
65
I/O
D5
66
I/O
D4
67
I
A19
68
I
A20
69
I
A21
70
I/O
D3
71
I/O
D2
72
I/O
D1
73
I/O
D0
74
I
A6
75
I
A5
76
I
A4
77
I
A3
78
I
A2
79
I
A1
80
GND
81
I
TEST
82
O
XSCCLK
83
O
XSRVID
84
O
XSTVD
85
I
TXIN
86
O
RXOUT
87
O
TXOUT
88
I
RXIN
89
O
XRTS
90
O
XDSR
91
I
XCTS
92
I
XDTR
93
O
XRSCI
94
O
XRSCD
95
I
XRSOPT
96
O
RTCIO
97
O
RTCCE
98
O
RTCCK
99
I/O
RTCDT
100
VDD
101
GND
102
O
PHIA
5 – 6
Function
System data input/output
System data input/output
System data input/output
Chip select 6 signal input
Chip select 2 signal input
System data input/output
System data input/output
System data input/output
System data input/output
Ground
Power supply
System data input/output
System data input/output
System data input/output
System data input/output
System address input/output
System address input/output
System address input/output
System data input/output
System data input/output
System data input/output
System data input/output
System address input/output
System address input/output
System address input/output
System address input/output
System address input/output
System address input/output
Ground
Test terminal
Reading serial clock
Reading serial data
Reading valid data output gate
Data receiving from SH1
Data sending to SH1
Data sending signal to PC
Data receiving signal from PC
Sending of send-ready signal to PC
Sending of data terminal ready to PC
Sending request from PC
Data set ready sending to PC
Call-back to PC
Carrier detection to PC
PCI/F presence detection
RTC input/output control
RTC chip select
RTC data transfer clock
RTC data input/output
Power supply
Ground
CCD clock A

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