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3.1.8 USB
The USB block supports the implementation of a "full-speed" device fully compliant to USB 2.0
standard. It provides an interface between the CPU (embedded local host) and the USB wire, and
handles USB transactions with minimal CPU intervention.
The USB specification allows up to 15 pairs of endpoints. Data for each endpoint is buffered in RAM
within the USB block and is read/written from the endpoint FIFO using DMA transfers or FIFO register
access. High-speed (high throughput) endpoints can use DMA while slower endpoints can use FIFO
register access.
The USB block can request up to six DMA channels, three for IN endpoints and three for OUT
endpoints.
USB Function
USBDP
USBDM
USBSENSE (GPIO40)
USBPUEN
VDDUSB
Note
USB differential (+) line
USB differential (-) line
USB detection (input)
USB pull-up control
Power supply for MARITA USB block
Table. USB Signal Interface of MARITA
Figure. Schematic of MARITA USB block
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3. TECHNICAL BRIEF
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