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IDE Solid State Disk
If bit 11 is set to 1 then this device supports IORDY operation.
If bit 11 is set to 0 then this device may support IORDY operation.
Bit 10: IORDY may be disabled
Bit 10 shall be set to 0, indicating that IORDY may not be disabled.
Bit 9: LBA supported
Bit 9 shall be set to 1, indicating that this device supports LBA mode addressing. Devices shall support
LBA addressing.
Bit 8: DMA Supported
If bit 8 is set to 1 then Read DMA and Write DMA commands are supported.
Bit 8 shall be set to 0. Read/Write DMA commands are not currently permitted on CF cards.
Word 51: PIO Data Transfer Cycle Timing Mode
The PIO transfer timing for each device falls into modes that have unique parametric timing specifications. The
value returned in Bits 15-8 shall be 00h for mode 0, 01h for mode 1, or 02h for mode 2. Values 03h through
FFh are reserved.
Word 53: Translation Parameters Valid
Bit 0 shall be set to 1 indicating that words 54 to 58 are valid and reflect the current number of cylinders, heads
and sectors. If bit 1 of word 53 is set to 1, the values in words 64 through 70 are valid. If this bit is cleared to 0,
the values reported in words 64-70 are not valid. Any device that supports PIO mode 3 or above shall set bit 1
of word 53 to one and support the fields contained in words 64 through 70.
Words 54-56: Current Number of Cylinders, Heads, Sectors/Track
These fields contain the current number of user addressable Cylinders, Heads, and Sectors/Track in the
current translation mode.
Words 57-58: Current Capacity
This field contains the product of the current cylinders times heads times sectors.
Word 59: Multiple Sector Setting
Bits 15-9 are reserved and shall be set to 0.
Bit 8 shall be set to 1 indicating that the Multiple Sector Setting is valid.
Bits 7-0 are the current setting for the number of sectors that shall be transferred per interrupt on Read/Write
Multiple commands.
Words 60-61: Total Sectors Addressable in LBA Mode
This field contains the total number of user addressable sectors for the device in LBA mode only.
Word 63: Multiword DMA transfer
Bits 15 through 8 of word 63 of the Identify Device parameter information is defined as the Multiword DMA
mode selected field. If this field is supported, bit 1 of word 53 shall be set to one. This field is bit significant.
Only one of bits may be set to one in this field by the device to indicate the multiword DMA mode which is
currently selected.
Of these bits, bits 15 through 11 are reserved. Bit 8, if set to one, indicates that Multiword DMA mode 0 has
been selected. Bit 9, if set to one, indicates that Multiword DMA mode 1 has been selected. Bit 10, if set to one,
indicates that Multiword DMA mode 2 has been selected. Selection of Multiword DMA modes 3 and above are
specific to device are reported in word 163 as described in Word 163: CF Advanced True IDE Timing Mode
Capabilities and Settings.
Bits 7 through 0 of word 63 of the Identify Device parameter information is defined as the Multiword DMA data
transfer supported field. If this field is supported, bit 1 of word 53 shall be set to one. This field is bit significant.
Any number of bits may be set to one in this field by the device to indicate the Multiword DMA modes it is
capable of supporting.
Of these bits, bits 7 through 2 are reserved. Bit 0, if set to one, indicates that the device supports Multiword
DMA mode 0. Bit 1, if set to one, indicates that the device supports Multiword DMA modes 1 and 0. Bit 2, if set
to one, indicates that the device supports Multiword DMA modes 2, 1 and 0.
Support for Multiword DMA modes 3 and above are specific to device are reported in word 163 as described in
Word 163: CF Advanced True IDE Timing Mode Capabilities and Settings.
Word 64: Advanced PIO transfer modes supported
Bits 7 through 0 of word 64 of the Identify Device parameter information is defined as the advanced PIO data
Rev. A.6
13/32
Nov. 2008
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