MACHINE INSTRUCTION FORMATS
FIRST HALFWORD
SECOND HALFWDRD
THIRD HALFWORD
I
I
S~~~~J~
1
~~r~~T~~
2
I
I
I_~'
I
AA
I
Op Code
I
At
!ji2J
I
o
REG;S~E~
112
151
I
:
OPERC~~
I
~~~R~:
Axl
OpCode
EI
X2
I
B2
!
02
I
78
1112
ISI6
1920
31
:
S~~~~TJ~l S~~~~~3 ~~RRf~t~F
:
Asl
OpCode
\~1
o
78
JJ
12
1516
1920
31
I
Ib~~~~~A6E:
~~JlRR~~b ,?F
:
51!
OpCode
tr:~
~
78
1516
1920
31
I
I
~~~:1~6 ~F
I
I
I~-==i
sL
OpCode
I
62
I
~
o
I
IS 16
1920
31
I
OPERAND 1 OPERAND 2
OPERAND 1
I
OPERAND 2
tOPCode~~
{
I
LENGTH
LENGTH
ADDRESS OF
I
ADDRESS OF
55
0
78.
IJl2
1516
1920
3132
3536
47
;
I
LENGTH
;
~~J>:f~b ~F
:
~~:£~b ~F
:
Ii
OpCode
Ff=FBT3cTill~
l
0
1~
1516
1920
3132
3536
4'
I
CONTROL REGISTERS
CR
Bit.
Name of fMkI
Aaoo:ioJted
with
Inlt.
0
0
Block·multiplex'g control
Block·multiplex 'g
0
1
SSM suppression control
SSM instruction
0
2
TOO clock
sync
control
Multiprocessing
0
5-9
rage
size controi
} Dynamic addr. transl,
0
10
Unassigned (must
be
zero}
0
11·12
Segment size control
0
16
Malfunction alert mask
} Mu I tiprocessi ng
0
17
Emergency signal mask
0
18
Extemal call mask
0
19
TOO clock sync check mask
0
20
Clock comparator mask
Clock comparator
0
21
CPU timer mask
CPU timer
0
24
Interval timer masR
Interval timer
I
25
Interrupt key mask
Interrupt key
1
26
External signal mask
External signal
1
1
0-7
Segment table length
I
Dynamic addr, transl.
I
0
8-25
Segment table addf'ess
0
2
0-31
Channel masks
Channels
I
1
8
16-31
Monitor masks
Monitoring
,
0
9
0
Successful branching event mask
I
0
1
Instruction fetching event mask
0
I
.
1
I
Storage alterarlOn event mask
Program-event recora'g
GR alteration event mask
, 16-31
flER general register
masks
0
10
8-31
PER starting address
Program-event record'g
I
0
11
8-31
PE R endi ng address
Program-event record'g
0
14
0
Check'stop control
I
Machine-check handling
1
1
Svnch. MCEL control
1
2
110
extended logout control
110
extended logout
0
4
Recovery report mask
)
"""'"~""'.
""""'"
0
5
Degradation report mask
0
6
Ext. damage
report mask
1
7
Warning mask
0
8
Asynch. MCEL control
0
9
Asynch. fixed log control
0
15
8-28
MCEL address
Machine-check handling
512
Page 2·12