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3.2.2.4 The status register
Address 10h is used by the status register. Reading from this
address will get the data from the status register. The format of status
register is:
Bit7-6
Gain
8245
Control
Timer 1
Bit 7-6: Current A/D gain control.
Bit 5 : Output of 8254 timer 1.
Bit 4 : Output of 8254 timer 0.
Bit 3 : Output of 8254 timer 2.
Bit 2 : Reserved. Used for hardware testing.
Bit 1 : Analog input type, '1' indicated that analog input type is
single-ended and '0' indicated analog input is differential.
Bit 0 : The A/D busy signal. '0' indicates busy, A/D is under
conversion. '1' indicates not busy, A/D is completely
converted and is idle now.
3.2.2.5 The A/D software trigger register
Writing to this port (1Ch) will generate an A/D trigger pulse signal.
Note: Although a very fast trigger can be performed (more than the speed
of A/D controller, 125K) via this method, a reasonable delay time
should be left between the two triggers.
Software
trigger
A/D
Busy
Figure 3-1. Software trigger delay time.
PCI-1002 User's Manual (Ver. 2.4, Mar./2004, PPH-015-24) ---- 29
Bit5
Bit4
8245
Timer 0
Timer 2
Delay time
8 μs
Conversion Time
Bit3
Bit2
8245
Reserve
d
Bit1
Bit0
Analog
A/D Busy
input
type
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