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4.2 The 8254 Timer
The PCI-1002 series provide 3 independent,16-bit timer/counters.
Each timer has different functions. Timer 0 is uses Pacer 0. Timer 1
is uses Pacer 1. Timer 2 is uses a machine independent timer.
The block diagram is given as follows:
Local Data Bus
D0...D7
User
8254
Figure 4-2. 8254 control diagram.
4.3 The A/D trigger
The A/D trigger is controlled by on-board A/D trigger controller.
The function diagram of A/D trigger is shown below:
0
1
External
Trigger.
Figure 4-3. A/D trigger controller.
PCI-1002 User's Manual (Ver. 2.4, Mar./2004, PPH-015-24) ---- 34
VCC
EN
CLK
Timer1
OUT1
CLK
Timer2
EN
OUT2
CLK
Timer3
EN
OUT3
8254
Timer 0
Software Trigger
PR
External Trigger
D
Q
EN
CLK
RS
4M-Hz
4 M Hz
8254
Timer 1
Trigger Select
Pacer 0
Pacer 1
Status
Mux
To A/D
Select
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