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d. Recommended Operating Conditions
e. Pin Functions
PIN
NAME
Number
SD
FAULT
LINP
LINN
GAIN0
GAIN1
AVCC
AGND
GVDD
PLIMIT
RINN
RINP
NC
PBTL
PVCCR
PVCCR
BSPR
OUTPR
PGND
OUTNR
BSNR
BSNL
OUTNL
PGND
OUTPL
BSPL
PVCCL
PVCCL
.
I/O/P
Pin
Shutdown logic input for audio amp (LOW = outputs Hi-Z, HIGH = outputs
1
I
enabled). TTL logic levels with compliance to AVCC.
Open drain output used to display short circuit or dc detect fault status. Voltage
compliant to AVCC. Short circuit faults can be set to auto-recovery by connecting
2
O
FAULT pin to SD pin. Otherwise, both short circuit faults and dc detect faults must
be reset by cycling PVCC.
3
I
Positive audio input for left channel. Biased at 3V.
4
I
Negative audio input for left channel. Biased at 3V.
5
I
Gain select least significant bit. TTL logic levels with compliance to AVCC.
6
I
Gain select most significant bit. TTL logic levels with compliance to AVCC.
7
P
Analog supply
8
Analog signal ground. Connect to the thermal pad.
High-side FET gate drive supply. Nominal voltage is 7V. Also should be used as
9
O
supply for PLIMIT function
Power limit level adjust. Connect a resistor divider from GVDD to GND to set
10
I
power limit. Connect directly to GVDD for no power limit.
11
I
Negative audio input for right channel. Biased at 3V.
12
I
Positive audio input for right channel. Biased at 3V.
13
Not connected
14
I
Parallel BTL mode switch
Power supply for right channel H-bridge. Right channel and left channel power
15
P
supply inputs are connect internally.
Power supply for right channel H-bridge. Right channel and left channel power
16
P
supply inputs are connect internally.
17
I
Bootstrap I/O for right channel, positive high-side FET.
18
O
Class-D H-bridge positive output for right channel.
19
Power ground for the H-bridges.
20
O
Class-D H-bridge negative output for right channel.
21
I
Bootstrap I/O for right channel, negative high-side FET.
22
I
Bootstrap I/O for left channel, negative high-side FET.
23
O
Class-D H-bridge negative output for left channel.
24
Power ground for the H-bridges.
25
O
Class-D H-bridge positive output for left channel.
26
I
Bootstrap I/O for left channel, positive high-side FET.
Power supply for left channel H-bridge. Right channel and left channel power
27
P
supply inputs are connect internally.
Power supply for left channel H-bridge. Right channel and left channel power
28
P
supply inputs are connect internally.
DESCRIPTION
25
LC-32LE511
LC-40LE511
LC-40LE531
LC
LC
LC
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Troubleshooting
